In instruction, the number of addresses is 0, the operand(s)’address is implied, which is(are) in_______.
A. accumulator
B. program counter
C. top of stack
D. any register
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The advantage of IMMEDIATE ADDRESSING is ___________.
A. limited address range
B. more memory access
C. limit value range
D. no memory access to fetch operand
After the information flow of fetch sub-cycle, the content of MBR is_____________.
A. operand
B. address of instruction
C. instruction
D. address of operand
Which is NOT a characteristic of RISC processor?
A. a highly optimized pipeline.
B. Register to register operations
C. a large number of general-purpose registers
D. a complexed instruction format
In MESI protocol,if the initiating cache’s state is exclusive, the snooping cache’s state is.
A. modified
B. exclusive
C. invalid
D. shared