现有四选一多路数据选择器的VHDL程序如下，请在空格中填入对应内容，实现预期功能。（空格排序为从上到下，从左到右依次增大）LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL;ENTITY MUX4_1 ISPORT( DIN: in STD_LOGIC_vector(__________ downto ___________);S: in STD_LOGIC_vector(___________ downto __________);DOUT: _______ STD_LOGIC);END;ARCHITECTURE BEHAVE OF ________ ISBEGINPROCESS(S,DIN)BEGINCASE S ISWHEN "00"=>DOUT<=DIN(0);WHEN "01"=>DOUT<=DIN(1);WHEN "______"=>DOUT<=DIN(2);WHEN "______"=>DOUT<=DIN(3);WHEN __________=>NULL;END __________;end process;end behave;