A. Interrupt-driven I/O B. Programmed I/O C. Direct I/O access DMA
A. Interrupt-driven I/O B. Programmed I/O C. DMA Direct I/O access
A. it isn’t necessary for CPU to save and restore scene B. it isn’t necessary for CPU to intervene the dada transfer C. it isn't necessary for CPU to read and check status repeatedly D. both A and B
A. Issue acknowledgement of interrupt B. Load new PC value based on interrupt C. Restore process state information D. Receive interrupt request signal
A. let the module remove the Request Signal B. let the module put the “vector” on data bus C. let the module send PC value to CPU D. A and B
A. it isn’t necessary for CPU to save and restore scene B. it isn’t necessary for CPU to intervene the dada transfer C. it isn’t necessary for CPU to read and check status repeatedly D. both A and B
A. before DMA module transfers a block data B. after DMA module finishes a block data transfer C. before DMA module seizes to use bus D. after DMA module ends to seize bus
A. PC B. AC C. SP D. PSW
A. CPU,I/O module B. I/O module,CPU CPU,memory D. memory,CPU