A. Overflow B. Arithmetic shift C. Underflow D. Partial product
A. MBR to contain the instruction B. Program counter to contain the C. MAR to contain the address of current instruction D. IR to contain the instruction that just fetched from memory
A. Stack addressing B. Displacement addressing C. Direct addressing D. Register addressing
A. write back B. LRU C. write through D. unified cache
A. conditional branch B. unconditional branch C. BRO D. BRZ
A. general purpose, user-visible B. user-visible, control and status C. data , address D. general purpose, control and status
A. 0 ~ 2n-1 B. -2n-1~ 2n-1 C. -2n-1~ 0 D. -2n-1~ 2n-1-1
A. accumulator B. program counter C. top of stack D. any register
A. limited address range B. more memory access C. limit value range D. no memory access to fetch operand
A. operand B. address of instruction C. instruction D. address of operand
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