The following statement is correct.
A. The interrupt request signal sent by each interrupt source will be marked in the IE register of AT89S51
B. The interrupt request signal from each interrupt source will be marked in the TMOD register of AT89S51
C. The interrupt request signal sent by each interrupt source will be marked in the IP register of AT89S51
D. The interrupt request signal sent by each interrupt source will be marked in the TCON and SCON registers of AT89S51
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8051 single chip microcomputer has () interrupt priority
A. 2
B. 3
C. 4
D. 5
The vector address of external interrupt source INT1 is ()
A. 0003H
B. 000BH
C. 0013H
D. 002BH
When the external interrupt 0 sends an interrupt request, the interrupt response condition is().
A. SETB ET0
B. SETB EX0
C. MOV IE,
D. 81H
E. MOV IE,
F. 61H
Interrupt is a kind of ()
A. Resource sharing technology
B. Data conversion technology
C. Data sharing technology
D. Parallel processing technology