In the interrupt request source of AT89S51, it is necessary to add a circuit to realize the interrupt cancellation.
A. Level mode external interrupt request
B. External interrupt request in edge hopping mode
C. External serial interrupt
D. Timing interrupt
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After interrupt query confirmation, in the following AT89S51 single-chip microcomputer operation, can immediately respond to is.
A. High priority interrupt processing is currently in progress
B. RETI instruction is currently executing
C. The current instruction is MOV A, R3
D. The current instruction is div instruction and is in the machine cycle of fetching instruction
The following statement is correct.
A. The interrupt request signal sent by each interrupt source will be marked in the IE register of AT89S51
B. The interrupt request signal from each interrupt source will be marked in the TMOD register of AT89S51
C. The interrupt request signal sent by each interrupt source will be marked in the IP register of AT89S51
D. The interrupt request signal sent by each interrupt source will be marked in the TCON and SCON registers of AT89S51
8051 single chip microcomputer has () interrupt priority
A. 2
B. 3
C. 4
D. 5
The vector address of external interrupt source INT1 is ()
A. 0003H
B. 000BH
C. 0013H
D. 002BH