In an instruction, the number of addresses is 2, one address does double duty of_________.
A. a result and the address of next instruction
B. an operand and a result
C. an operand and the address of next instruction
D. two closed operands
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Whyis the branch instruction the worst to limit instruction pipeline?
A. the number of its pipeline stages is larger
B. its instruction cycles iscomplex
C. it can invalidate several instruction fetches
D. the number of its pipelines is large
In indirect sub-cycle , CPU must ___________.
A. fetch operand or store result
B. fetch operand’s address from memory
C. fetch next instruction from memory
D. nothing
In MESI protocol, a read missoccursin the local cache.The beginning state: initial is invalid,snoopy is exclusive. After initiating CPUreadthe data, theendingstateis.
A. initial is exclusive, snoopy is invalid
B. initial is shared, snoopy is shared
C. initial is modified, snoopy is shared
D. initial is modified, snoopy is invalid
is not in SMP’sproperties.
A. Using shared memory
B. Using 2 or more same orsimilarprocessors.
C. Using 2-level local caches
D. Using highperformancenetwork-linkage
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